AMD's Future L2 and L3 Stacking Could Transform CPU Performance

AMD is still pushing the limits of processor technology by improving stacked chip designs and advancing the cache architecture. These changes will have a big effect on future performance measures, especially if cache topologies change and latency levels out across layers.

The 9800X3D and other recent processors show that adding more L3 cache to existing CPUs can speed up applications sensitive to latency. By putting more data directly on the package, you don't have to go to external memory like DDR5 as much. As a result, game performance often improves significantly compared to non-X3D parts.

AMD isn't stopping at L3, L2 is becoming the next big thing.

Future designs will add more L2 capacity, new ways to stack things, and lower latency. All of these changes could improve performance in many ways. A newly discovered patent that describes AMD's "balanced latency stacked cache" method shows these adjustments.

The patent explains that planar caches, embedded directly in the base die, experience higher latency as they grow. More pipeline stages are needed for larger caches, since data has to travel farther across the die.

As an example:

A standard planar 1MB L2 has a delay of about 14 cycles.

A stacked 1MB L2, on the other hand, can get roughly 12 cycles.

AMD can benefit from larger caches while keeping or reducing latency by stacking caches and changing routing. The patent shows numerous ways to do things, such as stacked L2, stacked L3, or a mix of the two. Each 512KB segment helps make a modular, scalable structure that could work with many types of processors.

We can presume that these new ideas are aimed at a future Zen-based processor throughout this conversation. It's unlikely to show up in Zen7, but later architectures are more likely. Rumors point to big plans for processors set to launch around 2028. These plans include new Zen cores with rebalanced cache hierarchies.

Some estimates say that designs will have 2MB L2 per core on-die and 7MB L3 slices per core using chiplets. These setups could significantly shift workloads, especially if AMD introduces classic, dense, and low-power core variants based on the same architecture.

Stacked L2 may only be available on server-grade hardware due to its complexity and cost. Still, as the technology improves, it could be used more widely. There will be many packaging problems, but the performance potential is very high.

Zen6 is likely to remain on the AM5 platform, which has several limitations, including dual-channel memory bandwidth. Early signs point to support for up to 8000MTS of memory, but escalating DRAM prices make things harder. People will probably be interested in the performance differences between the 5600, 6000, and 8000MTS systems.

Some Zen6 implementations may also use two high stacks of L3, according to rumors. AMD appears to be preparing to release an outstanding next-generation architecture with up to 24 cores.

There is still no clear answer about Zen7. Some sources suggest it will stay on AM5, while others believe it will move to AM6. AMD's choice may be affected by the memory market's ups and downs, especially as DDR6 is likely to be highly pricey. There is also the chance that the product lines will be divided, with higher-end Zen7 parts moving to a new platform and mainstream processors staying on the old one.

Earlier sources said that Razer Lake would have the same setup as Nova Lake, with 16P cores and 32E cores.

New information reveals that this is true and that both generations will use the same socket. The platform's continuity should make upgrades easier, especially since Intel has made many improvements to it over the past few years.

Sources also say that E-core designs would see significant improvements, which aligns with Intel's plan to focus on high-efficiency cores.

Even if stacked cache is technically difficult, AMD is moving in a direction that will lead to big performance gains in the long run. The next several generations of CPUs are going to be some of the most cutting-edge we've ever seen, thanks to AMD and Intel's ongoing work on designs, memory subsystems, and packaging technology. It's a good idea to stay healthy and keep an eye on what's going on. There is a lot more to come.