AMD Zen 7 Leak Reveals 32 Core AM5 and 36 Core Halo Designs

Zen7 architecture showcases modular chiplet scaling from 8core budget dies to 36core Halo designs.

Hardware by Shinji Okazaki on Feb 28, 2026

A few months ago, we learned exclusive information about the performance, release dates, and specs of upcoming Zen7-based products. These included Grimlock Ridge, a 32-core CPU slated for AM5 by the end of 2028; the 264-core Steamboat configuration for EPYC servers; a 20-core consumer APU; and the 36-core Halo Mega APU configuration. Many photographs supporting the leak were shared previously. But until now, there were no full photographs of the CPUs themselves.

The pictures seen are computer-generated. That isn't new. To protect sources, goods are often shown instead of raw photographs. Sometimes, graphics are made by combining notes from multiple sources, working with a renderer to create a mockup, and checking the proportions against documentation to ensure they are correct. Then, people check whether the representations match what was observed inside. That method lets picture leaks happen without hurting anyone.

AMD, Zen 7 Leak Reveals 32 Core, AM5 and 36 Core Halo Designs, NoobFeed

This method has been employed before, such as in the MI300 leak, which used information from people who had seen the hardware but couldn't release pictures. Even if there were verified photos, the RTX 4070 and Titan ADO leaks were rendered to protect sources. The Intel Alchemist engineering sample leak was achieved by sending specific descriptions back and forth until the render matched the sample. When compared to the genuine thing, the outcome was correct.

There are no full photographs of Zen7 yet, only schematics, mockups, and blueprints. By putting those together, you can see what Zen7 will look like years before it comes out. The timing is good because it's a calmer news time, and we know that the prior Zen6 pictures from comparable sources were correct.

Grimlock Ridge 32Core AM5

We start with the 32-core Grimlock Ridge model. We know the die sizes of the IO die and the 16-core chiplets because Zen7 uses the same IO die as Zen6. That means this setup is correct to within mm².

AMD is putting two 16-core CCDs on the IO chip in the AM5 socket. If you bought a Zen4 flagship 4 to 6 years before Zen7 came out, you got a 5nm 16-core processor. You can upgrade to a 32-core CPU based on 14A technology on the same platform.

The single-threaded boost could be close to 2x, whereas the multi-threaded boost could be greater than 2x and 3x or more. Also, the setup might have almost 0.5GB of L3 cache for gaming. The update will have a big effect on both gaming and multi-threaded workloads.

But making 32-core VCache models on TSMC14A won't be cheap. In 2028 and 2029, many gamers might still want 8 cores. AMD's answer is a chiplet with a reduced budget.

Chiplets Silverton and Silver King

Silverton is the code name for the 16-core CCD. The term for a smaller CCD, measuring about 56 mm², is Silver King. The Silver King chiplet can't use VCache and has a connection with half the bandwidth of the 16-core model. It was made to lower costs and make SKUs like the $300 8core AM5 CPU possible.

16-core Silverton CCDs will be binned at high clock speeds, possibly even above 7 GHz. The 8-core Silver King CCDs will probably be sorted by efficiency at lower voltages and clock speeds, notably for use in laptops.

AMD can segregate leaky yields for desktop use and keep efficient silicon for mobile use by using small dies that yield many chips. That method of dividing products into different groups makes them more flexible.

Grimlock Point APU

Grimlock Point uses an IO die approximation that is based on internal descriptions and documentation. The exact size of the die is unknown; similar goods, such as Medusa Point, are about 200 mm².

The IO die has 12 cores, a mix of Zen7 and Zen7C processors. We don't know how many low-power cores there are, but it's likely between 2 and 4. An 8-core CCD can be added to the 12 cores in the IO die.

AMD can make a high-end laptop chip without having to design a whole new APU thanks to its modular strategy. When you connect it to a dedicated GPU, you can add more cores, lowering development costs while increasing performance.

AMD, Zen 7 Leak Reveals 32 Core, AM5 and 36 Core Halo Designs, NoobFeed

Halo 36Core Grimlock

The IO die in Grimlock Halo is also an estimate. The documentation says there are 20 cores built into the die: 8 Zen7 traditional cores and 12 Zen7C cores. There may be more low-power cores, but they aren't included.

With 20 cores and built-in computation units, it can work as a single APU in its base configuration. When you connect two 8-core chiplets with bridge dies, the total number of cores goes up to 36, not counting any extra low-power cores.

The layout seems more like Strix Halo than Medusa Halo. Zen6 added bridge dies and a 12-core chiplet to its structure. Zen7 builds on it by using two bridge dies and 8-core laptop chiplets, and adding extra cores on the IO die itself.

Final Thoughts

Some people might wonder why a 16-core desktop setup with two 8-core Silver King CCDs wasn't presented. It is possible, but it is unlikely to be the intended desktop method. The 8-core chiplet is mainly there to cut costs and use yields that aren't good enough for laptop efficiency goals.

It isn't realistic that desktop computers will have hybrid combinations like 8-core plus 16-core. Depending on power and thermal targets, laptop models can try out additional things.

Zen7 adds more ways to configure things on both desktop and mobile platforms. With shared IO dies, modular chiplets, and varied binning strategies, AMD gains flexibility in scaling performance and cost. Expectations for 2026 to 2028 will keep changing as more confirmations come in.

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